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PhD Candidate and researcher in Machine Learning, with 21 years of industrial experience in software, FPGA & IC Design Engineering with Digital SoC / IP ASIC, FPGA and PCB design and test, training and customer support experience in a variety of different industries. Project manager, team and technical leader. 2 years of External Examiner experience, 9 years of lecturing and research supervision experience. 3 years of research experience whilst completing a PhD.
- ACADEMC AND RESEARCH EXPERIENCE
- Publications and outputs
- Research Supervision
- Engagement and Collaboration
Academic and Research Experience
Worked as a research assistant on a PhD project in Trinity College Dublin. Presently working on my research PhD, researching Micro-architectural Optimisations of Machine Learning Algorithms in FPGAs and ASICs for Power and Area Conservation.
Current research interests include Micro-architectural optimisations in hardware and low level software of artificial intelligence and machine learning algorithms. These optimisations are primarily targeted at reducing power and gate count in FPGA and ASIC devices.
Publications and Outputs
Peer Reviewed Journal Articles
Garland, J. and Gregg D. (2018) ‘Low Complexity Multiply Accumulate Units for Convolutional Neural Networks with Weight-Sharing’, in ACM Transactions on Architecture and Code Optimisation (TACO), vol. 15, no. 3, August 2018, Article 31, pp. 1-24, doi: 10.1145/3233300
Garland, J. and Gregg D. (2017) ‘Low Complexity Multiply Accumulate Unit for Weight-Sharing Convolutional Neural Networks’, in IEEE Computer Architecture Letters, vol. 16, no. 2, pp. 132-135, July-Dec. 1 2017, doi: 10.1109/LCA.2017.2656880
Garland, J. and Gregg D. (2017) ‘Low Complexity Multiply Accumulate Unit for Weight-Sharing Convolutional Neural Networks’, ACACES 2017 Poster Abstracts, 2017, pp. 53-56, HiPEAC, the European Network of Excellence on High Performance and Embedded Architecture and Compilation.
Conference Proceedings and Papers
Garland, J. and Gregg D. (2017) ‘Low Complexity Multiply Accumulate Unit for Weight-Sharing Convolutional Neural Networks’, Poster presentation, HiPEAC ACACES 2017.
Current Research Students
- Supervising final year undergrad students at present.
- Funding application for the President’s Research Fellowship programme has been submitted to fund an EngCORE Masters which, if successful, I will supervise the electronics design.
Past Research Students
- Meehan, Eoin (2006), M.Sc. in Computer Science (Ubiquitous Computing), "Are you looking at me?", Trinity College Dublin
- Carter, James (2006), M.Sc. in Computer Science (Ubiquitous Computing), "Study of power saving on Mica2 motes", Trinity College Dublin
- Kantas, Charalampos (2008), M.Sc. in Computer Science (Mobile and Ubiquitous Computing), "Design & Analysis Of Power-Efficient Embedded FPGA Sensor Systems", Trinity College Dublin
Areas of Interest as a Supervisor include
- Embedded Computing
- Sensor systems
- ASIC and FPGA design
- MAchine Learning
Engagement and Collaboration
Sought industrial collaboration in an expression of interest for research proposals for the Microelectronics Circuits Centre Ireland (MCCI) call.